Infineon SRAM is Space Bound


Stalwart SRAM continues to find uses in space and on the ground, and Infineon Technologies LLC recently introduced new products targeted at both, including one that is non-volatile.

The company is targeting its highest density QML-V-certified QDR-II+ SRAM at satellites to simplify on-system image processing. The use case is an example of how the aerospace industry has shifted some data processing from the ground to the actual satellite to equip them with increased computational power and lower latency, said VP Fellow of Aerospace and Defense Helmut Puchner. SRAM is a better solution for on-board satellite image processing than DRAM, which has higher latency and memory bank restrictions. He said Infineon’s 144-Mb QDR-II+ SRAM reduces overall system complexity, while enabling satellite image processing with better resolution.

Infineon’s QDR SRAM can act as a high-speed external cache memory for radar, on-board data processing and networking applications in space, including imaging gathering and processing (Courtesy of NASA/JPL-Caltech via Infineon)

One of the driving demands for a memory device such as Infineon’s QDR-II+ SRAM is due to the ongoing paradigm shift toward powerful FPGAs and processors that are becoming available for space applications, said Puchner. “They need a lot of memory support because they only have a limited amount of embedded SRAM on chip. They have no DRAM on chip typically, because the DRAM technology would be too far off from the mainstream CMOS flow.”

Previous generations of this SRAM are already in use in various space programs such as the NASA Surface Water and Ocean Topography (SWOT) research satellite mission using Synthetic Aperture Radar technology. Puchner said Infineon’s SRAM is best suited to act as a high-speed external cache memory for radar, on-board data processing and networking applications in space, it’s been certified to the DLA Qualified Manufacturers List Class V (QML-V), the highest quality and reliability standard certification for aerospace-grade ICs, and it’s radiation hardened (rad hard).

The rad-hard characteristics are achieved through proprietary design and process hardening techniques that Infineon calls RadStop. The technology enables a higher level of radiation performance while delivering the throughput demanded by space-bound applications, operating at up to a maximum frequency of 250 MHz and delivering up to 36 Gbps throughput in a 165-ball Ceramic Column Grid Array (CCGA) package, while being rad hard for up to 200 krad(Si). Because the device is latch-up immune, system reliability in harsh environments is improved.

The use of a ceramic package hermetically sealed with solder columns contributes to is robustness for space use, said Puchner. While the company’s RadStop enables the device to handle 200 krad, to issue the part for that level of radiation with QML-V moniker, Infineon needed to demonstrate functionality up to 400 krad. It’s more then enough, he said, when you consider that the worst orbit for a satellite is a geosynchronous one that is 10,000 to 15,000 miles out, and stationary over the earth and rotaing with the earth. “In a 15 to 20-year mission of that satellite, it would maybe consume 20 to 30 krad.”

Aside from the rad hard characteristics, Puchner said the QDR-II+ SRAM is well suited for specific radar applications, including Synthetic Aperture Radar (SAR), wherein the radar antenna moves with respect to the object being tracked. “The accuracy of the radar typically depends on the size of the antenna, so the bigger the antenna, the better the accuracy.” Because the antenna could be moving as fast as eight kilometers per second and sending many signals it creates the illusion that the antenna is eight kilometers long when in fact it’s only 10 to 20 centimeters, he said, and that provides good resolution. “You could go for contour scan or even penetration into a forest, camouflage, or even into water.” However, that requires the throughput, low-latency, true random access, and the no hidden refresh of a QDR SRAM that would detrimental on a DRAM.

Longer term, this space-memory may have applications on the ground. Just as data processing is now being done on satellites rather than being sent back to Earth, edge computing devices are increasingly doing more on-board data processing rather than shipping it all the way to a central cloud data center. In the meantime, Infineon also recently announced a new iteration of nvSRAMs that are qualified for QML-Q and high-reliability industrial specifications to support demanding non-volatile code storage and data-logging applications in harsh environments, including aerospace and industrial applications, albeit not space.

A fault logger in an aircraft cockpit can take advantage of non-volatile SRAM (nvSRAM) to quickly record and errors that can be stored until for later review by a maintenance technician. (Courtesy Infineon)

The 256 kb STK14C88C and 1 Mb STK14CA8C nvSRAMs SONOS non-volatile technology. Puchner said that under normal operating conditions, an nvSRAM acts similarly to a conventional asynchronous SRAM, but it automatically saves a copy of the SRAM data into non-volatile memory in the event of a power failure, where the data is protected for more 20 years. “It has basically two memories in one package. It is a classical SRAM, so you read and write to the SRAM like an asynchronous SRAM, and it has this non-volatile memory technology called SONOS where SONOS means silicon-oxide-nitride-oxide-silicon.”

One of the challenges this combination solves is overcoming the relative slowness of non-volatile memories, said Puchner, as well as the timing, which is critical for some defense applications because these real-time systems need fact access to the processor. An example might be that of a fault logger in an aircraft cockpit, he said. “All these errors get written into the SRAM portion during flight, and then when the airplane lands and the pilots power off the plane, that data gets stored into nonvolatile portion of the nvSRAM and preserved there.” This allows a maintenance technician to power up the plane at a later date and read the log.

The advantage of an nvSRAM is that it has the high processing speed of an SRAM but the ability to remember information. That makes it useful for industrial applications such as robots on the manufacturing floor, said Jim Handy, principal analyst with Objective Analysis, because an nvSRAm can retain certain parameters in the event of a power outage, which creates a potential risk of the robots crashing into each other even people. One option is to have the robots return to their home position when the power comes back on, and start their routine again, he said, but the other is to store exactly what their positions were in the middle of their routine when the power failed. “That would take a non-volatile memory.”

There’s a solid business case for the latter option, said Handy, because in the case of a bunch of robots working an automobile assembly line, they wouldn’t have to start over again and require a human to figure out what got done and what didn’t get done before the power when out. “It would be an expensive thing to do. If they can just have everybody pick up where they left off and finish that one car, then you’ve saved a lot of money.”

Handy said the reason why SRAM continues to find itself space-bound is because it’s low power. “Power is something that’s kind of scarce in space.” It’s also less sensitive to alpha particles that cause data corruption, which makes it a better option than DRAM for many extra-terrestrial applications. SRAM also works well for processing information is that often the amount is quite small, even though both endpoints are rather intelligent, he said. “The amount of bandwidth that you need to communicate over a channel is inversely proportional to how smart the things are at either end.”

Infineon’s QDR SRAM essentially means there’s enough smarts in space to process data, said Handy. “They don’t have to send every image that the satellite is taking of the earth or whatever else.”

Gary Hilson is a general contributing editor with a focus on memory and flash technologies for EE Times.

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