The time for embedded FPGA (eFPGA) has finally come, and that’s evident from its reach in chips serving wireless infrastructure, artificial intelligence (AI), smart storage, and even cost-sensitive microcontrollers. As a system on chip (SoC) subsystem—just like a CPU or DSP—it dynamically reconfigures the hardware logic with sizes ranging from 1,000 to 500,000 look-up tables (LUTs).
For a vantage point on this emerging programmable technology, EDN spoke to Andy Jaros, VP of IP sales, marketing and solution architecture at Flex Logix Technologies. Flex Logix, founded in 2014 as an IP company, claims to provide high-density FPGA fabric to facilitate logic reconfigurability without requiring design engineers to carry out herculean work.
We started the discussion by asking Jaros about the origins of this technology. Jaros is a semiconductor industry veteran with a career path that spans from Arm and ARC to Motorola and Synopsys.
History: Not so fast
The notion of eFPGA has a checkered history that goes back to the 1990s. People in the semiconductor have long been talking about incorporating LUTs in ASICs to gain additional flexibility. However, unlike FPGAs that came with robust toolchains, the dearth of tools was a major stumbling block in implementing embedded FPGA IP in chips.
Jaros recalls there have been claims about the creation of eFPGA fabric for decades. “Some folks at old semiconductor companies say that they used to do that some 20 to 30 years ago, but the way they implemented embedded FPGA took a large area.”
Traditional FPGAs use a mesh interconnect, and 80% of the area in an FPGA is taken by the interconnect. Flex Logic co-founder Cheng Wang developed a hierarchal interconnect that takes half the area compared to mesh interconnect. That, in turn, offers significant area and cost benefits. The eFPGA IP supplier also claims to achieve 90% utilization from its interconnect; on the other hand, with mesh interconnect used in discrete FPGAs, we see nearly 70% utilization.
Figure 1 An eFPGA can be easily optimized for various bus sizes. Source: Flex Logix
Present: Business is good
The eFPGA technology is very generic because its support spans from very small instances to very large instances for various applications. An eFPGA, which works like an off-the-shelf FPGA chip, can deliver arrays of any size in a matter of days.
“We are getting a lot of traction with ASIC companies,” Jaros said. “The integration of FPGA functionality into ASIC improves performance and reduces power consumption and cost at the system level.” That allows design engineers to do away with FPGA altogether or use a less expensive FPGA, depending on the application requirements.
Jaros also noted that system companies, which have traditionally used FPGAs, are starting to explore eFPGA IPs along with their ASIC partners. It allows system houses to stay on the lower levels of the middle stack. Moreover, while market requirements are changing quickly, system houses like automotive OEMs and tier 1’s can’t wait a year to add new features. “Therefore, some RTL configurability makes more sense than it did 10 years ago.”
Then, there are higher-end MCUs that are starting to incorporate hardware accelerators, whether for neural network AI processing or proprietary code acceleration. These scenarios typically use 16,000 to 20,000 LUTs. Next, Jaros sees more interest from mixed-signal companies. “The only thing that changes on the digital side is state machines,” said Jaros. “So, mixed-signal designers are looking at eFPGAs to add a level of configurability for the state machine without having to invest in an MCU and full software tool flow.”
Figure 2 Flex Logix’s eFPGA is based on EFLX 4K, a tile that comes in two versions: all logic or mostly logic with some multiply-accumulators (MACs). Source: Flex Logix
Future: Competition with discrete FPGAs
The common perception about the eFPGA business is that it will pose a threat to the standalone FPGA segment. However, what Intel and Xilinx are doing is developing complex products. “Intel and Xilinx are moving into the larger FPGA space to support hyper-scale data centers, and for that, they are adding hardware CPU subsystems around their FPGAs,” Jaros said. “I don’t see eFPGA impacting Intel and Xilinx as they are selling large, expensive FPGAs with lots of functionality.”
He added that the eFPGA business is very complementary. “We have talked with Xilinx and Intel folks, and they don’t see any conflicts at all.” That’s also because the requirements for reconfigurability span across a wide range of industry segments and, as a result, there might not be much of a conflict with traditional FPGA companies.
Figure 3 The eFPGA IP suppliers don’t see much of a conflict with traditional FPGA companies. Source: Flex Logix
Another factor driving the eFPGA business is companies that want to control their supply chain. They may have their own MCUs or ASSPs around which they have built software stacks. So, by adding some level of eFPGA reconfigurability, they can swap security algorithms or proprietary code.
The eFPGA IPs are available from multiple suppliers, and while these IPs are relatively more integrative, the density of FPGA is starting to make sense for certain applications. The other thing that has shifted the pendulum in favor of eFPGAs is the move toward smaller process nodes. Flex Logix, while supporting process nodes spanning from 180 nm to 5 nm, is currently engaged in chip designs all the way to 3 nm.
“We are seeing more willingness to trade off a little bit of area for configurability,” Jaros concluded. “So, a vast majority of chips that will tape out in the next five to 10 years will have some degree of eFPGA content.” The fast-moving standards and unique AI algorithms support this narrative and subsequently eFPGA’s promise in the near future.
Majeed Ahmad, Editor-in-Chief of EDN and Planet Analog, has covered the electronics design industry for more than two decades.