Renesas enters the FPGA market with devices that serve cost-sensitive applications requiring less than 5000 gates of logic. The first devices in the ForgeFPGA family consume as little of 20 µA standby and are expected to cost well under $0.50 in volume.
Initial ForgeFPGAs will furnish 1k and 2k lookup table (LUT) sizes. They are supported by free, easy-to-use software with no license fees. The downloadable software offers two development modes to accommodate both new and experienced FPGA developers. A macrocell mode uses a schematic capture-based development flow, while an HDL mode provides a familiar Verilog environment for FPGA veterans.
The ForgeFPGA development team is the same group that introduced the successful GreenPAK series of programmable mixed-signal devices at Silego Technology, which came into the Renesas portfolio as part of the Dialog Semiconductor acquisition. The new FPGAs will use the same business model and infrastructure as the GreenPAK line: free software and worldwide applications support.
ForgeFPGA engineering samples are available now, along with beta design software and a prototype development kit. The first 1k LUT device is expected to be available in production quantities in Q2 2022.
Find more datasheets on products like this one at Datasheets.com, searchable by category, part #, description, manufacturer, and more.