*Editor’s Note: This is a four-part series of DIs proposing improvements in the performance of a “traditional” PWM—one whose output is a duty cycle-variable rectangular pulse which requires filtering by a low-pass analog filter to produce a DAC. The first part suggests mitigations and eliminations of common PWM error types.* *The second discloses circuits driven from various V _{supply} voltages to power rail-rail op amps and enable their output swings to include ground and V_{supply}. *

*This third part pursues the optimization of post-PWM analog filters.*

* **Part 1 can be found here.*

* **Part 2 can be found here.*

Recently, there has been a spate of design ideas (DIs) published (see Related Content) which deals with microprocessor-generated pulse width modulators driving low-pass filters to produce DACs. Approaches have been introduced which address ripple attenuation, settling time minimization, limitations in accuracy, and enable outputs to reach and include ground and supply rails. This is the third in a series of DIs proposing improvements in overall PWM-based DAC performance. Each of the series’ recommendations are implementable independently of the others. This DI addresses low pass analog filters.

*Wow the engineering world with your unique design:* *Design Ideas Submission Guide*

**The PWM output **

Spectrally, the PWM output consists of a desirable DC (average) portion and the remainder—undesirable AC signals. With a period of T, these signals consist of energy at frequencies n/T, where n = 1, 2, 3, etc., that is, harmonics of 1/T. If the PWM switches between 0 and 1, for every harmonic n there exists a duty cycle corresponding to a peak signal level of (2/π)/n. This shows the futility of an attenuation scheme which focuses on a notch or band reject type of filter—there will always be a significant amount of energy that is not attenuated by such. The highest amplitude harmonic is the first, n = 1. At the very least, this harmonic must be attenuated to an acceptable level, α. Any low pass filter that accomplishes this will apply even more attenuation to the remaining harmonics which are already lower in level than the first. In summary, the search for the best filter will focus on what are called all-pole low pass filters, which is another way of saying low pass filters which lack notch and band-reject features.

**The skinny on low pass all-pole filters**

Analog filters can be defined as a ratio of two polynomials in the complex (real plus imaginary) variable s:

Where I ≤ K. The terms z_{i} and p_{i} are referred to respectively as the zeroes and the poles of the filter. K is the order (first, second, etc.) of the filter as well as the number of its poles. All-pole filters of unity gain at DC can be specified simply as:

Filter types include Butterworth, Bessel, Chebyshev, and others. These make different trade-offs between the aggressiveness of attenuation with increasing stop-band frequency and the rapidity of settling in response to a time domain impulse, step, or other disturbance. Improving one of these generally denigrates the other. Tables of poles for various orders and types of these filters can be found in the reference [1]. Values given are for filters which at approximately 1 radian per second (2π Hz) exhibit 3 dB of attenuation with respect to the level at DC. This point is considered to be the transition between the low frequency pass and high frequency stop bands. Multiplying all poles by a frequency scaling factor (FSF) will cause the filter to attenuate 3 dB at 2π·FSF Hz. The frequency response of a filter can be calculated by substituting j·2π·f for s in H(s) and taking the magnitude of the sum of the real and imaginary parts. Here, j = √-1 and f is the frequency in Hz.

The time domain response of a filter to a change in PWM duty cycle reveals how quickly it will settle to the new duty cycle average. For a filter of unity gain at DC, this involves subtracting from 1 the inverse Laplace transform of H(s)/s. A discussion of Laplace transforms, their inverses, and practical uses is beyond the scope of this DI. These inverse transforms can, however, be readily determined by using a web-based tool [2].

**Requirements of an optimal filter**

A filter must attenuate the maximum value over all duty cycles (2/π) of the PWM first harmonic by a factor of α. A b-bit PWM has a resolution of Full-Scale·2^{-b}. So, for the first harmonic peak to be no greater than ½ LSB, α should be set to (π/2)·2^{-(b+1)}. Asking for more attenuation would slow the filter response to a step change in duty cycle. From the time domain perspective, the time t_{s} should be minimized for the filter to settle to +/- α · Full Scale in response to a duty cycle change from Full Scale to zero.

**Towards an optimal filter**

Consider a 12-bit PWM clocked from a 20 MHz source. The frequency of its first harmonic is F_{0} = 4883 Hz, and its α is 1.917·10^{-4}. 3^{rd}, 5^{th}, and 7^{th} order filters of types Bessel, Linear Phase .05° and .5° Equiripple error, Gaussian 6 dB and 12 dB, Butterworth, and .01 dB Chebyshev are considered. These are roughly in order of increasingly aggressive attenuation with frequency coupled with increasing settling times. Appropriate FSFs are needed to multiply the poles (listed in reference [1]) of each filter to achieve attenuation α at F_{0} Hz. Excel’s Solver [3] was used to find these factors. The scaled values were divided by 2π to convert them to Hertz and applied to LTspice’s [4] 2ndOrderLowpass filter objects in its Special Functions folder to assemble complete filters. The graph in **Figure 1** shows the frequency responses of 24 scaled filters. These include 3^{rd}, 5^{th}, and 7^{th} order versions of the filter types listed above. These filters were named after the mathematicians who developed the math describing them (I have for some reason failed to find any information about Mr. or Ms. Equiripple). Additionally, there are the same three orders of one more filter type that was developed by the author and will be described later. Although the author makes no claims of being a mathematician, for want of an alternative, these have been named Paul filters. (An appalling choice, I’m sure you’ll agree.)

**Figure 1** The frequency response of 24 scaled filters including include 3^{rd}, 5^{th}, and 7^{th} order versions of the 7 filter types listed above (Bessel, Linear Phase, Equiripple, Gaussian, Butterworth, Chebyshev and the Paul filter developed by the author) where the value of α is depicted by the horizontal red line.

In Figure 1, the value of α is depicted by the horizontal line. It and all the filter responses intersect at a frequency of F_{0} (the PWM’s first harmonic) satisfying the frequency response attenuation requirement. **Figure 2** is the Bessel filter portion of the LTspice file which generates the above graph. The irregular pentagons are LTspice’s 2ndOrderLowPass objects. The resistors and capacitors implement first order sections. H = 1 is the filter’s gain at DC.

**Figure 2** The Bessel filter portion of the LTspice file which generates the response in Figure 1, U1-U6 are LTspice’s 2ndOrderLowPass objects, resistors and capacitors implement first order sections, and H = 1 is the filter’s gain at DC.

By changing the “.ac dec 100 100 10000” command in the file to “.tran 0 .01 0”, replacing the “SINE (0 1) AC 1” voltage source with a pulsed source “PULSE(1 0 0 1u 1u .0099 .01)” and running the simulation, the response of these filters to a duty cycle step from 1 V to 0 V is obtained as shown in **Figure 3**.

**Figure 3 **Replacing the AC voltage source with a pulsed source to change the duty cycle step of the filter response from 1 V to 0 V.

Oh, what a lovely mess! The vertical scale is the common log of the absolute value of the response—absolute value because the response oscillates around zero, and log because of the large dynamic range between 1 and α, the latter of which is again shown as a horizontal line.

Which filter’s absolute response settles (reaches and remains less than α) in the shortest period of time? To find the answer to that question, use is made of LTspice’s “*Export data as text*” feature under the “*File*” option made available by right-clicking inside the plot. This data is then imported into Excel. Each filter’s data is parsed backwards in time starting from 10 ms. The first instants when the responses exceed α are recorded. These are the times that the filters require to settle to α. (As can be seen, there were some that require more than 10 ms to do so.) For each filter order, it was determined which type had the shortest settling time. **Table 1** shows the settling times to ½ LSB for 8-bit through 16-bit PWMs of 3^{rd}, 5^{th}, and 7^{th} orders of filters of various types.

**Table 1** Settling times to ½ LSB for 8-bit through 16-bit PWMs of 3^{rd}, 5^{th}, and 7^{th} orders for various types of filters. The fastest settling times are shown in **bold red** while those that failed to settle within 10 ms are grey and listed as “> 10 ms”.

The entries in each table row with the fastest settling time is shown in **bold red**. Those which failed to settle within 10 ms are listed as > 10 ms and are greyed-out. In general, the 7^{th} orders settled faster than the 5^{th} orders, which were noticeably faster than the 3^{rd}’s. Also, those with the lower Q sections settled faster than the higher Q alternatives (again, see the tables in reference [1]). The Chebyshev filters with ripples greater than .01 dB (not depicted) for instance, had higher Q’s than all the ones listed above and had hopelessly long settling times.

As a group, the Paul filters settled the fastest, but that does not preclude the selection of another filter in an instance when it settles faster. Still, it’s worth discussing how the Pauls were developed. Starting with the 3^{rd}, 5^{th}, and 7^{th} order frequency-scaled Bessel poles, the Excel Solver evaluated the inverse Laplace transforms of the filters’ functions H(s). It was instructed to vary the pole values while minimizing the maximum value of the filter response after a given time t_{s}. This was made subject to the constraint that the amplitude response of |H(2πj·F_{0})| be α, where F_{0} = 20MHz / 2^{12} and α = (π/2)·2^{-(12+1)}. If the maximum response exceeded α for a given t_{s}, t_{s} was increased. Otherwise t_{s} was reduced. Several runs of Solver led to the final set of filter poles. It is interesting that even though the optimization was run for a 12-bit PWM only, settling times at other bit lengths between 8 and 16 is still rather good and in most cases superior to those of the other well-known filters. The Paul filter poles and Qs are listed in Table 2.

**Table 2** The poles and Qs for 3^{rd}, 5^{th}, and 7^{th} order Paul filter.

**Table 3** includes FSFs for the poles of the well-known filters. The unscaled poles are given in the tables of reference [1]. The scaled poles are characteristic of filters which also attenuate a frequency of F_{0 }by a factor of α.

**Table 3** The FSFs for the poles of the well-known filters in the tables of reference [1] for the values of α and F_{0}.

** ****Implementing a filter**

A starting point for the implementation of a filter whose poles are taken from a reference table is to apply to those poles an appropriate FSF. These factors are given for well-known filters in Table 3 for an attenuation, α, at a frequency of F_{0} Hz. In Table 2, the Paul filter poles have already been scaled as such. For any of these filters, to change the α from a frequency F_{0} to F_{1} Hz, the poles should be multiplied by an FSF of F_{1}/F_{0}.

In settling quickly to the small value of α, some of the biggest errors in filter performance are due to component tolerances. To limit these errors, resistors should be metal film, 1% at worst with 0.1% preferred. Capacitors should be NPO or C0G for temperature and DC voltage stability, 2% at worst and 1% preferred. Smaller value resistors result in a quieter design and lead to smaller offset voltages due to op amp input bias and offset currents. However, these also require larger-valued, bigger, and more expensive capacitors. Keep these restrictions in mind when proceeding with the following steps.

For a first order section with pole ω:

- Start by guessing values of R and C such that RC = 1/ω.
- Choose a standard value NPO or COG capacitor close to that value of C.
- Calculate R’ = 1/(ω·C) where C is that standard value capacitor.
- Choose for R the next smaller standard value of R’ and make up the difference with another smaller resistor in series. Although this will not compensate for the components’ 1% and 2% tolerances, it will yield a result which is optimal on average.
- Connect one terminal of R to the PWM output and the other to the capacitor C (ground its other side) and to the input of a unity gain op amp. If gain is required in the aggregate filter, it is this op amp which should supply it rather than one which implements a second order section; unlike second order sections, gain in this op amp has no effect on the R-C section’s AC characteristics because there is no feedback to the passive components. The output of this op amp should drive the cascade of remaining second order sections (
**Figure 4**).

**Figure 4** Recommended configuration where one terminal of R is connected to the PWM output, and the other is connected to the capacitor C (ground its other side) and to the input of a unity gain op amp.

For second order sections with pole ω and quality factor Q, error sources are again component values. Errors can be exacerbated by the choice of a filter topology. A second order Sallen Key [5] section with the least sensitivity employs an op amp configured for unity gain as shown in **Figure 5**.

**Figure 5** A second order Sallen Key section with the least sensitivity employs an op amp configured for unity gain.

To select component values:

- Start by choosing values of R and C such that RC = 1/ω.
- Choose standard values of C
_{1}and C_{2}similar to C such that C_{1}/ C_{2}is as large as possible, but no larger than 4Q^{2}. Creating a table of all possible capacitor ratios is helpful in selecting the optimal ratio. - Calculate D = (1 – 4Q
^{2}·C_{2}/C_{1})^{0.5}and W = 2·Q·C_{2}·ω - For R
_{1a}, select a standard resistor value slightly less than (1 + D)/W and add R_{1b}in series to make up the difference. - For R
_{2a}, select a standard resistor value slightly less than (1 – D)/W and add R_{2b}in series to make up the difference. - If there are more than one second order section, the sections should be connected in order of decreasing values of Q to minimize noise.

**A PWM filter example**

Consider a 5^{th} order Paul filter with an attenuation of α at a frequency F_{1} = F_{0}/2. Each of the ω values in the Paul filter table would be multiplied by an FSF of F_{1}/F_{0} = ½, but the Q’s would be unchanged. The following schematic shown in **Figure 6** satisfies these constraints.

**Figure 6** A 5^{th} order Paul filter scaled to operate at F_{0}/2 Hertz.

* ***Designing PWM analog filters**

A set of tables listing settling times to within ½ LSB of 8 through 16-bit PWMs of period 204.8 µs (1/4883 = 1/F_{0} Hz) has been generated for 3^{rd}, 5^{th}, and 7^{th} order versions of eight different filter types. These filters attenuate the peak value of steady state PWM-induced ripple to ½ LSB. From these listings, the filter with the fastest settling time is readily selected. These filters can be adapted to a new PWM period by multiplying their poles by a scaling factor equal the ratio of the old to new periods. New settling times are obtained by dividing the ones in the tables by that same ratio.

Pole scaling factors for the operation of well-known filters at F_{0} are supplied in a separate table. The poles of these filters are available in reference [1] and should be multiplied by the relevant factor to accomplish this. A new “Paul” filter (already scaled for F_{0 }operation) has been developed which in most cases has faster settling times than the well-known ones while providing the necessary PWM ripple attenuation. As with the others, it too can be scaled for operation at different frequencies.

It should be noted that component tolerances will lead to filters with attenuations and settling times which differ somewhat from the calculations presented. Still, it makes sense to employ filters with the smallest calculated settling time values.

*Christopher Paul has worked in various engineering positions in the communications industry for over 40 years.*

**Related Content**

- Double up on and ease the filtering requirements for PWMs
- Optimizing a simple analog filter for any PWM
- Fast-settling synchronous-PWM-DAC filter has almost no ripple
- Cancel PWM DAC ripple and power supply noise
- Cancel PWM DAC ripple with analog subtraction
- Cancel PWM DAC ripple with analog subtraction—revisited
- Cancel PWM DAC ripple with analog subtraction but no inverter
- Fast PWM DAC has no ripple

** ****References**

- http://www.analog.com/media/en/training-seminars/design-handbooks/basic-linear-design/chapter8.pdf%20 (specifically Figures 8.26 through 8.36. This reference does a great job of describing the differences between the filter response types and filter realization in general.)
- https://www.wolframalpha.com/input?i=inverse+Laplace+transform+p*b%5E2%2F%28%28s%5E2%2Bb%5E2%29*%28s%2Bp%29%29
- https://support.microsoft.com/en-us/office/define-and-solve-a-problem-by-using-solver-5d1a388f-079d-43ac-a7eb-f63e45925040
- https://www.analog.com/en/design-center/design-tools-and-calculators/ltspice-simulator.html
- https://www.ti.com/lit/an/sloa024b/sloa024b.pdf

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