The chiplet design movement is gathering steam, and the availability of one-stop advanced packaging solutions is a testament to this semiconductor technology’s advancement toward mass production. Such coordinated solutions for advanced packaging are crucial in the vertically disintegrated world of chiplets.
Take the case of Faraday Technology Corp., an ASIC design service and IP provider now eyeing advanced packaging-coordinated platforms for the vertical disintegration of chiplets. Such platforms streamline the advanced packaging processes by integrating multiple vendors and multi-source chiplets while providing three core services: design, packaging, and production.
In this role, Faraday aims to coordinate the vertically disintegrated vendors of chiplet, high-bandwidth memory (HBM), interposer, and 2.5D/3D packaging while offering chiplets design, testing analysis, production planning, outsourcing procurement, inventory management, and 2.5D/3D advanced packaging services.
On its part, Faraday designs and implements major chiplets, including I/O dies, SoC/compute dies, and interposers. Next, to ensure seamless integration of multi-source dies, Faraday has inked strategic partnerships with fabs and OSATs to support passive/active interposer manufacturing with through-silicon via (TSV) and thus effectively manage 2.5D/3D packaging logistics.
Figure 1 Faraday has introduced an advanced packaging coordinated platform for the vertical disintegration of chiplets.
Faraday’s partners include fabs such as Intel Foundry, Samsung Foundry and UMC as well as several OSATs. These partners help Faraday ensure capacity, yield, quality, reliability, and schedule in production for chiplets with multi-source dies.
One-stop chiplet solutions
Faraday has unveiled a 2.5D packaging platform jointly developed with Kiwimoore, a Shanghai, China-based interconnect solutions provider. The advanced packaging platform—which has successfully entered the mass production stage—incorporates Kiwimoore’s chiplet interconnect and network domain-specific accelerator (NDSA) solutions.
Besides NDSA, Kiwimoore provided various chiplets, including a 3D general-purpose base die and high-speed I/O die. On the other hand, Faraday integrated multi-source chiplets from different semiconductor manufacturers, encompassing compute dies, HBM design, and production.
Figure 2 Kiwimoore provided a general-purpose base die and a high-speed I/O die for this chiplet project.
The two companies collaborated on chiplet SoC/interposer design integration, testing and analysis, outsourced procurement, and production planning services. Mochen Tien, CEO of Kiwimoore, acknowledged that Faraday’s supply chain capabilities ensured stable supply of critical components like interposers and HBM memory.
Such system-level product design integration services allow chipmakers to focus on core die development, shortening design cycles and reducing R&D costs. “Through our close collaboration, we have successfully simplified the chiplet design and packaging processes and quickly integrated chiplets from different suppliers,” said Flash Lin, COO of Faraday.
The emergence of such one-stop solutions with flexible services and business models complements chiplets’ system-level design as well as the broader ecosystem encompassing multi-source chiplets, packaging, and manufacturing. It also reveals the larger technology blueprint in the commercial realizations of chiplet design and packaging.
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