Positron’s $230M Funding Led By Financial Trading Firms


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Doha, Qatar — Data center AI inference chip startup Positron has raised a huge $230-million series B to develop and deploy its AI ASIC, Asimov. The round was led by strategic investors, including Arena Private Wealth and Jump Trading, both Chicago-based financial trading firms and potential Positron customers.

The 34-month-old startup has reached a post-money valuation of over $1 billion, making it one of an increasing number of AI chip unicorns.

Positron CEO Mitesh Agrawal told EE Times that the large raise was due to “insane” inbound interest. The company operates in a very capital-efficient way, he said, having spent only $38 million to date. The company has already received purchase orders in excess of that amount, he noted.

“[The large raise] is a way for us to go on offense,” Agrawal said. “When we are going to go this big, both on the supply side and the vendor side of the ecosystem, bypassing CoWoS and HBM, we have to position ourselves to show that we can follow through. We also want to give our customers confidence that we can scale out production.”

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While Agrawal is confident in Positron’s architecture and technology, the extra funding also gives the company “multiple shots at a go-to-market strategy,” he said. “More capital allows us to cater to different workloads, to go to different types of customer bases. And to have a longer time in the market to pitch our silicon.”

“When the market offers you capital, you take it,” he added. “You figure out a way that it is good for all of you, but you take it. Times may turn, and it could get challenging, even with an amazing product, so there’s an element of pragmatism too.”

Other new investors include the Qatar Investment Authority (QIA) and climate-focused fund Helena.

“[Climate] is a new angle for us,” Agrawal said. “I did a pitch at a conference around performance per Watt efficiency and how that can be impactful in terms of using existing air-cooled data centers, and that led to a conversation. We realized there is potential interest from that [climate] perspective as well [as performance and performance per dollar].”

FPGA-based

Positron is working on hardware acceleration for transformer inference in the data center. The company’s first-generation product, Atlas, uses FPGAs—specifically, the Agilex-7M with HBM and DDR5. The company’s secret sauce is in its method of achieving extremely high memory bandwidth utilization (93% for HBM); transformer inference is memory-bound, but despite FPGAs’ relatively low FLOPS, better utilizing memory bandwidth can produce tokens faster than current-generation GPUs.

Positron's Asimov ASIC will use LPDDR chiplets with memory fanout gearbox chiplets from Credo (Source: Positron)
Positron’s Asimov ASIC will use LPDDR chiplets with memory fanout gearbox chiplets from Credo. (Source: Positron)

The company is working on a second-generation product, a multi-die ASIC it calls Asimov. Asimov will use LPDDR memory (no HBM), but the company’s ability to get close to the theoretical peak memory bandwidth means they don’t need to rely on HBM to produce fast tokens, Positron CTO Thomas Sohmers told EE Times.

Asimov’s compute elements are an evolution of Atlas’s, with Arm cores added and networking expanded. Asimov is set to have 2 TB of LPDDR5x memory capacity; four Asimovs will be hosted in each air-cooled server, Titan.

Positron has a joint development agreement with Credo Semiconductor on the Weaver memory fanout gearbox chiplet, which enables high-bandwidth memory connectivity for Asimov. Weaver achieves 2 Tbits per millimeter of beachfront at 1 pJ per bit using Credo’s 112 G very short reach (VSR) serdes on one side and LPDDR PHYs on the other. Asimov will use 20 Weaver chiplets. As the design is chiplet-based, Asimov will get a mini-tock when Credo releases the LPDDR6 version of Weaver, Sohmers said, without needing a respin.

Positron has grown its team to 50 in the last six months and will grow to around 100 by the end of 2026. The startup is handling all its ASIC design work in-house, preferring to keep close control of the final design and mask set, knowing that iterations in the final stages of the process can be critical, Sohmers said. (While the majority of Positron’s technical team are FPGA experts, many in Asimov’s hardware team of 22 also have significant ASIC design experience, Sohmers said.) Moving forward, Positron intends to continue commercializing an FPGA-based version of future products, followed by an ASIC version in a model based on Intel’s famous tick-tock cadence. This means the company can get to market faster and get customer feedback faster, Sohmers said, while being better able to try new ideas. The target is an annual release cadence from now on, he added.

Positron’s tick-tock model (Source: Positron)
Positron’s tick-tock model (Source: Positron)

Financial trading

Lead investor Jump Trading had come to Positron as a customer, but was so impressed that it became an investor.

“For the workloads we care about, the bottlenecks are increasingly memory and power—not theoretical compute,” said Jump Trading CTO Alex Davies. “In our testing, Positron Atlas delivered roughly 3× lower end-to-end latency than a comparable H100-based system on the inference workloads we evaluated, in an air-cooled, production-ready footprint with a supply chain we can plan around. The deeper we went, the more we agreed with Positron’s roadmap—Asimov and the Titan systems—as a memory-first platform built for future workloads. We invested because Positron combines traction today with a roadmap that can reshape the cost curve and capabilities for inference.”

Aside from speed, companies like Jump Trading are looking for low power as they typically deploy both in exchanges and in their own data centers, Sohmers said, noting that on-prem racks can typically handle 7-15 kW per rack. Positron’s Atlas FPGA cards need 150-200 W each.

Financial trading companies do care about cost, Sohmers said, since a big customer in this space might be spending hundreds of millions on compute every year in a mix of cloud compute for R&D/algorithm development and on-prem hardware for deployment.

“These types of companies spend tens of millions on ASIC development for very low volume chips, but they are also responsible for the biggest market growth segment in the FPGA space,” Sohmers said.

Because their strategies and algorithms are proprietary, they generally want to keep ASIC development in-house.

“They can recoup their hardware investments quickly, meaning they can work with refresh cycles of a year or less,” Sohmers said.

According to Sohmers, Jump Trading was particularly impressed with what he calls “extreme ease of use.”

“Since we’re transformer-specific, they were able to evaluate [their workloads on] our technology remotely in a day,” Sohmers said. “An on-prem deployment they thought would take a couple of months, they managed to get up and running in weeks.”

Jump Trading welcomed the opportunity to work more closely with Positron on next-generation hardware, since visibility into their hardware roadmap can inform algorithm development. They have unique access to the program at the lower levels of Positron’s stack today, Sohmers said, noting that Positron is contemplating making these levels available to other customers.

The first deployment with Jump Trading is really a small test deployment, Agrawal said.

“This is a great market for us to find a footing,” Agrawal said. “There is specificity in the workload, but if you can show that [there’s a synergy with your architecture], there is plenty of stickiness.” 

Asimov is due to tape out toward the end of the third quarter, with samples coming at the end of the first quarter of 2027.


See also:
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Startup Positron Takes On Nvidia With FPGAs

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