Siemens announced continued collaboration with TSMC to drive innovation in AI-powered automation and advanced semiconductor design enablement. Building on a longstanding relationship within the TSMC Open Innovation Platform® (OIP) ecosystem, the companies are expanding design enablement efforts across semiconductor design workflows to help mutual customers improve productivity, accelerate design cycles and manage increasing design complexity.
As part of this collaboration, Siemens and TSMC have enabled an AI-powered agent for automated design rule check (DRC) fixing across digital and custom integrated circuit (IC) design flows. Powered by Calibre® software and tightly integrated with Aprisa™ software and Solido™ software, the agent is designed to help engineering teams reduce manual effort, improve workflow efficiency and accelerate time-to-tapeout.
“Our continued collaboration with TSMC exemplifies Siemens’ commitment to delivering AI-driven automation and advanced semiconductor design capabilities that help customers innovate at the industry’s most advanced process nodes,” said Ankur Gupta, executive vice president, EDA IC Software, Siemens Digital Industries Software. “By combining Siemens’ EDA portfolio with TSMC’s leading process and packaging technologies, we are helping customers achieve new levels of productivity, speed and design confidence.”
“AI presents a significant opportunity to drive productivity and efficiency across increasingly complex semiconductor design workflows,” said Aveek Sarkar, director of the ecosystem and alliance management division at TSMC. “Our collaboration with OIP partners like Siemens focuses on delivering intelligent, trusted automation that empowers engineers to navigate rising design complexity while achieving stringent performance and energy-efficiency targets. By integrating AI into critical stages of the design process, we enable mutual customers to leverage TSMC’s industry-leading processes and advanced packaging technologies to accelerate the expansion of AI innovation.”
Advancing AI-Powered Semiconductor Design
Siemens and TSMC are collaborating to advance AI-powered semiconductor design with the Fuse™ EDA AI System and Fuse™ EDA AI Agent, enabling autonomous, long-running and self-verifying EDA workflows. These agentic workflows can reason across complex, multi-step design tasks, orchestrate actions across multiple EDA tools, and continuously validate and improve engineering outcomes. Fuse EDA AI Agent is further enhanced by NVIDIA AI technologies delivering greater token efficiency while improving reasoning and execution across long-running engineering workloads.
A key innovation is an AI-powered DRC-fix workflow that combines Calibre® software, Aprisa™ AI and Solido™ Fuse technologies to intelligently identify, analyze and resolve design rule violations across digital and custom IC design flows. This builds on the Calibre Check Assist capability, which provides contextual guidance and design rule information during DRC debugging, helping designers diagnose and resolve violations more efficiently. The collaboration also includes agentic custom IC design capabilities powered by Solido Fuse.
The collaboration further extends to agentic place-and-route and digital implementation workflows enabled by Aprisa software. Together, these innovations help engineering teams automate repetitive and time-intensive tasks, leverage domain-aware AI guidance, accelerate design convergence and improve productivity from design creation through tapeout.
Supporting TSMC 3DFabric® Technologies
Siemens and TSMC continue to collaborate on advanced 3D IC design enablement for TSMC 3DFabric® technologies. Siemens has enabled multi-machine support with Calibre 3DStack Advanced software for inter-chiplet antenna verification, including support for TSMC-SoIC®, an innovative wafer-level 3D IC chip stacking platform. Further, certification work is underway to support chip-on-wafer-on-substrate with local silicon interconnect (CoWoS-L). These enhancements deliver necessary scalability and runtime performance for increasingly complex 3D IC designs. This work demonstrates performance improvements in Interface Check Flow for TSMC-SoW™.
Siemens’ EDA portfolio, including Solido Simulation Suite software, Calibre xACT software and Calibre 3DThermal software, is supporting collaborative work with TSMC across multiple innovative 3D IC and multiphysics design initiatives, including silicon photonics applications and other advanced packaging technologies.
In addition to certification for static and transient thermal analysis of TSMC 3DFabric technologies, Calibre 3DThermal software has achieved certification for TSMC A16™ static and transient thermal analysis and completed enablement for the system-on-wafer thermal reference flow. Further, work is in progress for TSMC-COUPE™ (Compact Universal Photonic Engine) reference flow.
The companies continue to make progress on complete 3Dblox support, including chip-package co-design workflows with major mutual customers. Siemens and TSMC are also collaborating on Aprisa software capabilities for pre-sim driven die-to-die (D2D) auto-routing, helping designers derive routing configurations intended to meet signal integrity specifications.
Siemens’ EDA technologies have also been enabled to support design, implementation and verification of TSMC-COUPE™ features. Joint silicon photonics development activities include design, implementation and verification flows using Innovator3D IC Integrator, Calibre 3DStack, Solido Simulation Suite, L-Edit software and Calibre Interactive. Solido Simulation Suite software also supports PAM4 measurements associated with TSMC-COUPE technology for optical transceiver interfaces. The joint validation efforts for Calibre 3DThermal solution for TSMC-COUPE™ are on-going.
Enabling Advanced Process Technologies
Siemens and TSMC continue collaborating on advanced node technology certification and design enablement. Calibre nmDRC, Calibre nmLVS, Calibre xACT and Calibre PERC have achieved certification for the TSMC A14 process node.
The Solido Simulation Suite software is certified for SPICE accuracy in TSMC N3C, A16 and A14 process technologies, enabling reliable analog, RF and memory verification. The collaboration also extends into TSMC’s custom design reference flow, where Siemens’ technologies support reliability-aware simulation capabilities that address IC aging, real-time self-heating, and safe operating area checks, as well as Solido Design Environment for advanced variation-aware verification and automated cell optimization.
Additionally, mPower software is certified for TSMC N2P (digital and analog) and N3C (analog) transistor-level IR/EM analysis, and Siemens continues collaborating with TSMC on N2 and N3 electromigration and IR-drop custom design reference flows. Certification activities for Aprisa software and mPower analog software on A14 technology are also underway.
Scaling Ecosystem’s Advanced Node Design Expertise
Siemens Xcelerator Academy provides user-friendly, self-paced, on-demand learning resources for Siemens’ EDA portfolio. The program is now available to TSMC Design Center Alliance partners in addition to mutual customers. Siemens recently released an end-to-end digital implementation flow lab tutorial based on TSMC 5nm process technology through the program, helping broaden access to advanced semiconductor design methodologies.
To learn more about how Siemens is helping semiconductor companies accelerate innovation through AI-powered automation, advanced verification technologies and industry-leading design enablement solutions, visit https://www.siemens.com/en-us/company/electronic-design-automation/